Example embodiments of the inventive concepts described herein relate to a method for fabricating a semiconductor chip and/or an electronic device configured to perform the same. For example, at least some example embodiments relate to an electronic device and/or a method which design a semiconductor chip for the purpose of fabricating the semiconductor chip.
A semiconductor chip may be designed to fabricate the semiconductor chip. Upon designing the semiconductor chip, placement and routing (P&R) is important to fabricate the semiconductor chip which is placed in the small area. The P&R may be performed using software such as an electronic design automation (EDA) vendor tool.
The placement includes placing cells to be used to design a semiconductor chip in a space on the software. A user may place cells in consideration of ports to be included in the cells and pins to be included in the ports. The routing includes connecting the cells placed in the placement. In the case where the placement is not efficiently performed, an issue that cells are not routed may occur. In the case where the placement does not satisfy a certain design rule, a problem may occur in operations following the P&R step.
When the routing is performed after the placement of the cells in the space on the software, the routing may be performed on the inefficiently placed cells. The inefficient placement of cells detected in the routing may cause a decrease in efficiency of the semiconductor design process.